Macros |
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| #define | QSPI_ENABLED |
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Enable QSPI driver.
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| #define | QSPI_CONFIG_SCK_DELAY |
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tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns).
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| #define | QSPI_CONFIG_READOC |
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Number of data lines and opcode used for reading.
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| #define | QSPI_CONFIG_WRITEOC |
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Number of data lines and opcode used for writing.
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| #define | QSPI_CONFIG_ADDRMODE |
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Addressing mode.
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| #define | QSPI_CONFIG_MODE |
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SPI mode.
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| #define | QSPI_CONFIG_FREQUENCY |
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Frequency divider.
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| #define | QSPI_PIN_SCK |
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SCK pin value.
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| #define | QSPI_PIN_CSN |
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CSN pin value.
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| #define | QSPI_PIN_IO0 |
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IO0 pin value.
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| #define | QSPI_PIN_IO1 |
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IO1 pin value.
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| #define | QSPI_PIN_IO2 |
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IO2 pin value.
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| #define | QSPI_PIN_IO3 |
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IO3 pin value.
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| #define | QSPI_CONFIG_IRQ_PRIORITY |
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Interrupt priority.
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Detailed Description
Macro Definition Documentation
| #define QSPI_CONFIG_ADDRMODE |
Addressing mode.
Following options are available:
- 0 - 24bit
- 1 - 32bit
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_CONFIG_FREQUENCY |
Frequency divider.
Following options are available:
- 0 - 32MHz/1
- 1 - 32MHz/2
- 2 - 32MHz/3
- 3 - 32MHz/4
- 4 - 32MHz/5
- 5 - 32MHz/6
- 6 - 32MHz/7
- 7 - 32MHz/8
- 8 - 32MHz/9
- 9 - 32MHz/10
- 10 - 32MHz/11
- 11 - 32MHz/12
- 12 - 32MHz/13
- 13 - 32MHz/14
- 14 - 32MHz/15
- 15 - 32MHz/16
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_CONFIG_IRQ_PRIORITY |
Interrupt priority.
Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
Following options are available:
- 0 - 0 (highest)
- 1 - 1
- 2 - 2
- 3 - 3
- 4 - 4 (except nRF51 family)
- 5 - 5 (except nRF51 family)
- 6 - 6 (except nRF51 family)
- 7 - 7 (except nRF51 family)
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_CONFIG_MODE |
SPI mode.
Following options are available:
- 0 - Mode 0
- 1 - Mode 1
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_CONFIG_READOC |
Number of data lines and opcode used for reading.
Following options are available:
- 0 - FastRead
- 1 - Read2O
- 2 - Read2IO
- 3 - Read4O
- 4 - Read4IO
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_CONFIG_SCK_DELAY |
tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns).
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_CONFIG_WRITEOC |
Number of data lines and opcode used for writing.
Following options are available:
- 0 - PP
- 1 - PP2O
- 2 - PP4O
- 3 - PP4IO
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_ENABLED |
Enable QSPI driver.
Set to 1 to activate.
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_PIN_CSN |
CSN pin value.
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_PIN_IO0 |
IO0 pin value.
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_PIN_IO1 |
IO1 pin value.
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_PIN_IO2 |
IO2 pin value.
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_PIN_IO3 |
IO3 pin value.
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.
| #define QSPI_PIN_SCK |
SCK pin value.
Minimum value: 0 Maximum value: 255
- Note
- This is an NRF_CONFIG macro.