Address offset: 0xFF4
Component ID1 Register
The CIDR1 register is a component identification register that indicates the presence of identification registers. This register also indicates the component class.
| Bit number | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ID | B | B | B | B | A | A | A | A | |||||||||||||||||||||||||||
| Reset 0x00000090 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | |||
| ID | R/W | Field | Value ID | Value | Description | ||||||||||||||||||||||||||||||
| A |
R |
PRMBL_1 |
Preamble[1]. Contains bits[11:8] of the component identification code. |
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|
Value |
0 |
Bits[11:8] of the identification code. |
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| B |
R |
CLASS |
Class of the component, for example, whether the component is a ROM table or a generic CoreSight component. Contains bits[15:12] of the component identification code |
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|
Coresight |
9 |
Indicates that the component is a CoreSight component. |
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