Each master connected to the AHB multilayer is assigned a default natural priority.
| Bus master name | Natural relative priority | In/Out |
|---|---|---|
| CPU | Highest priority | I/O |
| Network core | I/O | |
| I2S | I/O | |
| PDM | I | |
| UARTE0, SPIM0, SPIS0, TWIM0, TWIS0 | I/O | |
| UARTE1, SPIM1, SPIS1, TWIM1, TWIS1 | I/O | |
| UARTE2, SPIM2, SPIS2, TWIM2, TWIS2 | I/O | |
| UARTE3, SPIM3, SPIS3, TWIM3, TWIS3 | I/O | |
| SAADC | I | |
| PWM0 | O | |
| PWM1 | O | |
| PWM2 | O | |
| PWM3 | O | |
| SPIM4 | I/O | |
| NFCT | I/O | |
| CC312 | I/O | |
| USBD | I/O | |
| QSPI | Lowest priority | I/O |