Instances
| Instance | Domain | Base address | TrustZone | Split access | Description | ||
|---|---|---|---|---|---|---|---|
| Map | Att | DMA | |||||
| CC_CHACHA | APPLICATION | 0x50845000 | HF | S | NSA | No |
CRYPTOCELL CHACHA engine |
Register overview
| Register | Offset | TZ | Description |
|---|---|---|---|
| CHACHA_CONTROL | 0x380 |
Control the CHACHA engine behavior. |
|
| CHACHA_VERSION | 0x384 |
CHACHA engine HW version |
|
| CHACHA_KEY[n] | 0x388 |
CHACHA key value to use. The initial CHACHA_KEY[0] register holds the least significant bits [31:0] of the key value. |
|
| CHACHA_IV[n] | 0x3A8 |
CHACHA Initialization Vector (IV) to use. The IV is also known as the nonce. |
|
| CHACHA_BUSY | 0x3B0 |
Status register for CHACHA engine activity. |
|
| CHACHA_HW_FLAGS | 0x3B4 |
Hardware configuration of the CHACHA engine. Reset value holds the supported features. |
|
| CHACHA_BLOCK_CNT_LSB | 0x3B8 |
Store the LSB value of the block counter, in order to support suspend/resume of operation |
|
| CHACHA_BLOCK_CNT_MSB | 0x3BC |
Store the MSB value of the block counter, in order to support suspend/resume of operation |
|
| CHACHA_SW_RESET | 0x3C0 |
Reset the CHACHA engine. |
|
| CHACHA_POLY1305_KEY[n] | 0x3C4 |
The auto-generated key to use in Poly1305 MAC calculation. The initial CHACHA_POLY1305_KEY[0] register holds the least significant bits [31:0] of the key value. |
|
| CHACHA_ENDIANNESS | 0x3E4 |
CHACHA engine data order configuration. |
|
| CHACHA_DEBUG | 0x3E8 |
Debug register for the CHACHA engine |