CTRL-AP implements a mailbox interface which enables the CPU to communicate with a
debugger over the SWD interface.
The mailbox interface consists of a transmit register MAILBOX.TXDATA with its corresponding status register MAILBOX.TXSTATUS, and a receive register MAILBOX.RXDATA with its corresponding status register MAILBOX.RXSTATUS. Status bits in the TXSTATUS/RXSTATUS registers are
set and cleared automatically when the TXDATA/RXDATA registers are written to and read from,
independently of the direction.Figure 2. Mailbox register interface
Mailbox transfer sequence
Sender writes TXDATA.
Hardware sets sender's TXSTATUS to DataPending.
Hardware sets receiver's RXSTATUS to DataPending.
Receiver reads RXDATA.
Hardware sets receiver's RXSTATUS to NoDataPending.
