Compare

nRF5340 Product Specification

The RTC implements one COMPARE event for every available compare register.

When the COUNTER is incremented and then becomes equal to the value specified in the register CC[n], the corresponding compare event COMPARE[n] is generated.

When writing a CC[n] register, the RTC COMPARE event exhibits several behaviors. See the following figures for more information.

If a CC value is 0 when a CLEAR task is set, this will not trigger a COMPARE event.

Figure 5. Timing diagram - COMPARE_CLEAR

Timing diagram - COMPARE_CLEAR

If a CC value is N and the COUNTER value is N when the START task is set, this will not trigger a COMPARE event.

Figure 6. Timing diagram - COMPARE_START

Timing diagram - COMPARE_START

A COMPARE event occurs when a CC value is N, and the COUNTER value transitions from N-1 to N.

Figure 7. Timing diagram - COMPARE

Timing diagram - COMPARE

If the COUNTER value is N, writing N+2 to a CC register is guaranteed to trigger a COMPARE event at N+2.

Figure 8. Timing diagram - COMPARE_N+2

Timing diagram - COMPARE_N+2

If the COUNTER value is N, writing N or N+1 to a CC register may not trigger a COMPARE event.

Figure 9. Timing diagram - COMPARE_N+1

Timing diagram - COMPARE_N+1

If the COUNTER value is N, and the current CC value is N+1 or N+2 when a new CC value is written, a match may trigger on the previous CC value before the new value takes effect. If the current CC value is greater than N+2 when the new value is written, there will be no event due to the old value.

Figure 10. Timing diagram - COMPARE_N-1

Timing diagram - COMPARE_N-1

If the COMPARE[i]_CLEAR short is enabled, the COUNTER will be cleared one LFClk after the COMPARE event.

Figure 11. Timing diagram - COMPARE_CLEAR

Timing diagram - COMPARE_CLEAR