Circuit configuration no. 1 for CLAA WLCSP

nRF5340 Product Specification

Circuit configuration number 1 for CLAA WLCSP is showing the schematic and the bill of materials table.

Table 12. Configuration summary for circuit configuration no. 1
Config no. Supply configuration Enabled features
VDDH VDD EXTSUPPLY DCDC on VREGH DCDC on VREGMAIN and VREGRADIO USB NFC
Config. 1 Battery/Ext. regulator N/A Yes Yes Yes Yes No
Figure 5. Circuit configuration no. 1 schematic

image/svg+xml XC1 XC2 VDD_nRF RF P0.00/XL1 P0.01/XL2 X1 32MHz C4 2.2nF C2 1.0 µ F C6 100nF P0.19 P0.16/QSPI3 P0.17/QSPI_CLK L3 10 µ H C3 1.0 µ F C1 0.7pF P0.03/NFC2 P0.04/AIN0 VDD_nRF P0.18/QSPI_CS X2 32.768kHz L5 10 µ H VDD_HV C8 100nF C17 1.0 µ F P0.08/TRACEDATA3 C9 100nF P0.22 C18 4.7 µ F P0.09/TRACEDATA2 P0.11/TRACEDATA0 P0.12/TRACECLK P0.13/QSPI0 P0.14/QSPI1 P0.20 P0.21 P0.23 P0.24 P0.25/AIN4 P0.05/AIN1 P0.06/AIN2 P0.07/AIN3 L4 10 µ H C7 1.0 µ F C14 1.0 µ F VDD_nRF C5 1.0 µ F P0.15/QSPI2 P0.02/NFC1 P0.26/AIN5 P0.27/AIN6 C15 4.7 µ F VBUS C16 4.7 µ F P1.00 P1.01 P1.02/I2C P1.03/I2C P1.04 P1.05 P1.06 P1.07 P1.08 P1.09 P0.28/AIN7 P0.30 P0.31 P0.29 P0.10/TRACEDATA1 C10 1.0 µ F C12 100nF VDD_nRF DECRF B1 VDD H11 VDD L5 DCC B6 DCCH D11 VBUS B11 DECUSB C11 VDD K1 DECR B4 DCCD A9 DECD A7 DECA B8 DECN B5 nRF5340 VDD E11 VDDH B12 VDD D2 VDD B7 VDD B10 VDD L11 VDD A3 ANT D1 XC1 A1 XC2 A2 SWDCLK F2 SWDIO F1 D- A11 D+ A12 RESET G2 U1A nRF5340-CLAA P0.00/XL1 F11 P0.01/XL2 F12 P0.26/AIN5 J2 P0.27/AIN6 H1 P0.06/AIN2 H10 P0.08/TRACEDATA[3] L12 P0.16/QSPI[3] K8 P0.02/NFC1 G11 P0.20 K5 P0.04/AIN0 G10 P0.05/AIN1 F10 P0.22 K4 P0.23 H3 P0.24 K2 P0.25/AIN4 L1 P0.19 J5 P0.17/QSPI_CLK L7 P0.03/NFC2 H12 P0.18/QSPI_CS K7 P0.07/AIN3 J10 P0.09/TRACEDATA[2] J9 P0.11/TRACEDATA[0] J7 P0.12/TRACECLK J6 P0.13/QSPI[0] K10 P0.14/QSPI[1] K9 P0.15/QSPI[2] L9 P0.21 J4 P0.28/AIN7 E3 P0.30 C4 P0.31 C5 P0.29 E2 P0.10/TRACEDATA[1] J8 U1B nRF5340-CLAA P1.11 C6 P1.10 E4 P1.09 H2 P1.01 E10 P1.02/I2C J11 P1.03/I2C K12 P1.06 J3 P1.07 G3 P1.08 F3 P1.12 C7 P1.13 C8 P1.14 C9 P1.15 C10 P1.00 D10 P1.05 L3 P1.04 K3 U1C nRF5340-CLAA P1.10 P1.11 P1.12 P1.13 P1.14 P1.15 C13 100nF L2 2.2nH C19 N.C. C11 100nF L1 2.2nH ANT VSS C2 VSS B9 VSS K11 VSS K6 VSS E6 VSS D12 VSS B2 VSS A5 VSS E5 VSS E7 VSS E8 VSS F5 VSS F6 VSS F7 VSS F8 VSS G5 VSS G6 VSS G7 VSS G8 U1D nRF5340-CLAA SWDCLK SWDIO D_N D_P RESET Optional R1 2R2
Note: For PCB reference layouts, see the product page for the nRF5340 on www.nordicsemi.com.
Table 13. Bill of material for circuit configuration no. 1
Designator Value Description Footprint
C1 0.7 pF Capacitor, NP0, ±0.05 pF 0201
C2, C3, C5, C7, C10, C14, C17 1.0 µF Capacitor, X7S, ±10% 0402
C4 2.2 nF Capacitor, X7R, ±10% 0201
C6, C8, C9, C11, C12, C13 100 nF Capacitor, X7S, ±10% 0201
C15, C18 4.7 µF Capacitor, X7S, ±10% 0603
C16 4.7 µF Capacitor, X7R, ±10% 0603
C19 N.C. Not mounted 0201
L1, L2 2.2 nH High frequency chip inductor, ±5% 0201
L3, L4 10 µH Inductor, 50 mA, ±20% 0603
L5 10 µH Inductor, 80 mA, ±20% 0603
R1 2.2 Ω Resistor, ±1%, 0.05 W 0201
U1 nRF5340-CLAA Multiprotocol Bluetooth Low Energy, IEEE 802.15.4, ANT, and 2.4GHz proprietary System on Chip WLCSP-95
X1 32 MHz Crystal SMD 2016, 32 MHz, Cl=8 pF, Total Tol: ±30 ppm. For frequency tolerance requirements, see 32 MHz crystal oscillator (HFXO). XTAL_2016
X2 32.768 kHz Crystal SMD 2012, 32.768 kHz, Cl=9 pF, Total Tol: ±50 ppm XTAL_2012