Virtual memory mapping

nRF5340 Product Specification

The PKA engine uses virtual register mapping to facilitate flexible data management across a variety of cryptographic algorithms.

Figure 3. Virtual register mapping

PKA_L[0]
...
PKA_L[7]
MEMORY_MAP[0]
(R0: N)
...
MEMORY_MAP[31]
(R31: T1)
...
...
Operand A
Operand B
Result
Tag / Operand C
...
PKA SRAM
Memory Map
registers
PKA Length
registers
...
MEMORY_MAP[n]
(Rn: Operand A)
...
MEMORY_MAP[1]
(R1: Np)
MEMORY_MAP[30]
(R30: T0)




REG_R
REG_A
REG_B
TAG
LEN
OPCODE
register
OPCODE
OPCODE register

All virtual registers must be defined and configured in the dedicated PKA SRAM before they can be accessed by the PKA engine during processing. This SRAM acts as a private memory pool for the PKA engine, where all other access is blocked during processing. The virtual registers are used as input for the PKA calculation and as a placeholder for intermediate and final results.

The PKA engine can be configured to perform multiple operations on virtual operand registers and store the result of the operation in a virtual result or intermediate result register. During the next iteration the PKA engine can then use an intermediate result register from a previous operation as a virtual operand register for further calculations. This re-mapping strategy enables the PKA engine to efficiently handle complex cryptographic operations.

In total there are 32 virtual registers that can be mapped to different PKA SRAM regions using register MEMORY_MAP[n] (n=0..31), denoted as virtual register R0 - R31. Four of these 32 virtual registers are special registers, and their register index mapping can be changed using register N_NP_T0_T1_ADDR:
  • N - holds the modulus number, by default mapped to virtual register R0. This register is used by the PKA engine for modular operations, and its modulus N value does not change during processing.
  • Np - holds the inverse modulus number, by default mapped to virtual register R1. This register is used by the PKA engine for the Barrett reduction algorithm, and its inverse modulus Np value does not change during processing.
  • T0 - temporary register, by default mapped to virtual register R30. This register is for internal use by the PKA engine.
  • T1 - temporary register, by default mapped to virtual register R31. This register is for internal use by the PKA engine.

All virtual registers must be 64 bits word size aligned, and the size of the virtual registers must be at least the size of the largest operand plus an extra 64 bits for internal PKA calculations. These extra 64 bits must be initialized to zero. This is applicable for all virtual registers R0 - R31. The configured virtual register size does not define the size of the operation, it only limits the largest operand size that can be used with the corresponding virtual register.

The memory map configuration can be altered dynamically by the PKA engine, depending on the operation. Not all virtual registers need to be configured for each operation. It is recommended to re-write the memory map configuration after a reset.