Peripherals send error reports once access violation is detected.
The following actions will happen if the logic controlled by the SPU detects an access violation on one of the peripherals:
- The faulty transfer will be blocked.
- In case of a read transfer, the bus will be driven to zero.
- If supported by the master, feedback is sent to the master through specific bus error signals. If the master is a processor supporting Arm TrustZone for Cortex-M, a SecureFault exception will be generated for security related errors.
- The PERIPHACCERR event will be triggered.