Instances
| Instance | Domain | Base address | TrustZone | Split access | Description | ||
|---|---|---|---|---|---|---|---|
| Map | Att | DMA | |||||
| GPIOTE0 | APPLICATION | 0x5000D000 | HF | S | NA | No |
GPIO tasks and events |
| GPIOTE1 | APPLICATION | 0x4002F000 | HF | NS | NA | No |
GPIO tasks and events |
| GPIOTE | NETWORK | 0x4100A000 | HF | NS | NA | No |
GPIO tasks and events |
Register overview
| Register | Offset | TZ | Description |
|---|---|---|---|
| TASKS_OUT[n] | 0x000 |
Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. |
|
| TASKS_SET[n] | 0x030 |
Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. |
|
| TASKS_CLR[n] | 0x060 |
Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. |
|
| SUBSCRIBE_OUT[n] | 0x080 |
Subscribe configuration for task OUT[n] |
|
| SUBSCRIBE_SET[n] | 0x0B0 |
Subscribe configuration for task SET[n] |
|
| SUBSCRIBE_CLR[n] | 0x0E0 |
Subscribe configuration for task CLR[n] |
|
| EVENTS_IN[n] | 0x100 |
Event generated from pin specified in CONFIG[n].PSEL |
|
| EVENTS_PORT | 0x17C |
Event generated from multiple input GPIO pins with SENSE mechanism enabled |
|
| PUBLISH_IN[n] | 0x180 |
Publish configuration for event IN[n] |
|
| PUBLISH_PORT | 0x1FC |
Publish configuration for event PORT |
|
| INTENSET | 0x304 |
Enable interrupt |
|
| INTENCLR | 0x308 |
Disable interrupt |
|
| LATENCY | 0x504 |
Latency selection for Event mode (MODE=Event) with rising or falling edge detection on the pin. |
|
| CONFIG[n] | 0x510 |
Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event |