The following section describe a simple cryptographic flow for this engine.
/* Enable CRYPTOCELL subsystem */
NRF_CRYPTOCELL->ENABLE = CRYPTOCELL_ENABLE_ENABLE_Enabled;
/* Enable engine clock */
NRF_CC_RNG->RNG_CLK = CC_RNG_RNG_CLK_ENABLE_Enable;
/* Reset engine */
NRF_CC_RNG->RNG_SW_RESET = CC_RNG_RNG_SW_RESET_RESET_Enable;
/* Configure sampling rate between consecutive bits */
do {
NRF_CC_RNG->RNG_CLK = CC_RNG_RNG_CLK_ENABLE_Enable;
NRF_CC_RNG->SAMPLE_CNT = NRF_FICR->TRNG90B.ROSC1;
} while ( NRF_CC_RNG->SAMPLE_CNT != NRF_FICR->TRNG90B.ROSC1 );
/* Configure ROSC length */
NRF_CC_RNG->TRNG_CONFIG = CC_RNG_TRNG_CONFIG_ROSC_LEN_ROSC1;
/* Enable noise source */
NRF_CC_RNG->NOISE_SOURCE = CC_RNG_NOISE_SOURCE_ENABLE_Enabled;
/* Wait for random data to be sampled */
while ((NRF_CC_RNG->RNG_ISR & CC_RNG_RNG_ISR_EHR_VALID_INT_Msk) == 0) {}
/* 192 bits of random data now available in
NRF_CC_RNG->EHR_DATA[0] to NRF_CC_RNG->EHR_DATA[5] */