Each ROM Table on the SoC contains a listing of the components that are connected to
the debug port or AHB-AP. These listings allow an external debugger or on-chip software to
discover the CoreSight devices on the SoC.
Figure 3. Application core ROM table overview
Table 7. Application core ROM table entries
Address
Component
Value
0xE00FEFFC
CIDR3
0x000000B1
0xE00FEFF8
CIDR2
0x00000005
0xE00FEFF4
CIDR1
0x00000010
0xE00FEFF0
CIDR0
0x0000000D
0xE00FEFDC
PIDR7
0x00000000
0xE00FEFD8
PIDR6
0x00000000
0xE00FEFD4
PIDR5
0x00000000
0xE00FEFD0
PIDR4
0x00000002
0xE00FEFEC
PIDR3
0x00000000
0xE00FEFE8
PIDR2
0x0000001C
0xE00FEFE4
PIDR1
0x00000040
0xE00FEFE0
PIDR0
0x00000007
0xE00FEFCC
MEMTYPE
0x00000001
0xE00FE004
TPIU
0xFFF42003
0xE00FE000
ROM table
0x00001003
Table 8. Application Arm
Cortex-M33 ROM table entries
Address
Component
Value
0xE00FF01C
MTB (not implemented)
0xFFF44002
0xE00FF018
CTI
0xFFF43003
0xE00FF014
ETM
0xFFF42003
0xE00FF00C
ITM
0xFFF01003
0xE00FF008
BPU
0xFFF03003
0xE00FF004
DWT
0xFFF02003
0xE00FF000
SCS
0xFFF0F003
Figure 4. Network core ROM table overview
Table 9. Network core ROM table entries
Address
Component
Value
0xE00FEFFC
CIDR3
0x000000B1
0xE00FEFF8
CIDR2
0x00000005
0xE00FEFF4
CIDR1
0x00000010
0xE00FEFF0
CIDR0
0x0000000D
0xE00FEFDC
PIDR7
0x00000000
0xE00FEFD8
PIDR6
0x00000000
0xE00FEFD4
PIDR5
0x00000000
0xE00FEFD0
PIDR4
0x00000002
0xE00FEFEC
PIDR3
0x00000000
0xE00FEFE8
PIDR2
0x0000001C
0xE00FEFE4
PIDR1
0x00000040
0xE00FEFE0
PIDR0
0x00000007
0xE00FEFCC
MEMTYPE
0x00000001
0xE00FE000
ROM table
0x00001003
Table 10. Network Arm
Cortex-M33 ROM table entries