RADIO can control up to 8 GPIO pins in order to control external antenna switches used in direction finding.
Pin configuration
The eight antenna selection signals are mapped to physical pins according to the pin numbers specified in the PSEL.DFEGPIO[n] registers. Only pins that have the PSEL.DFEGPIO[n].CONNECTED field set to Connected will be controlled by RADIO. Pins that are disconnected will be controlled by GPIO.
During transmission in AoD TX mode or reception in AoA RX mode, RADIO automatically acquires the pins as needed. At times when RADIO does not use the pin, the pin is released to its default state and controlled by the GPIO configuration. Thus, the pin must be configured using the GPIO peripheral.
| Pin acquired by RADIO | Direction | Value | Comment |
|---|---|---|---|
| Yes | Output | Specified in SWITCHPATTERN | Pin acquired by RADIO, and in use for DFE. |
| No | Specified by GPIO | Specified by GPIO | DFE not in progress. Pin has not been acquired by RADIO, but is available for DFE use. |
Switch pattern configuration
The values of the GPIOs while switching during the CTE are configured by writing successively to the SWITCHPATTERN register. The first write to SWITCHPATTERN is the GPIO pattern applied from the call of TASKS_TXEN or TASKS_RXEN until the first antenna switch is triggered. The second write sets the pattern for the reference period and is applied at the start of the guard period. The following writes set the pattern for the remaining switch slots and are applied at the start of each switch slot. If writing beyond the total number of antenna slots, the pattern will wrap to SWITCHPATTERN[2] and start over again. During operation, when the end of the SWITCHPATTERN buffer is reached, RADIO cycles back to SWITCHPATTERN[2]. At the end of the AoA/AoD procedure, SWITCHPATTERN[0] is applied to DFECTRL1.TSWITCHSPACING after the previous antenna switch. The SWITCHPATTERN buffer can be erased/cleared using CLEARPATTERN.
A minimum number of three patterns must be written to the SWITCHPATTERN register.
If CTEINLINECONF.CTEINLINECTRLEN is not set, then the antenna switch spacing is determined by DFECTRL1.TSWITCHSPACING (see Switching and sampling spacing based on CTEType). DFECTRL2.TSWITCHOFFSET determines the position of the first switch compared to the configurable start of CTE (see DFECTRL1.DFEINEXTENSION).