INTENSET

RW

READY

Write '1' to enable interrupt for event READY

RW

ADDRESS

Write '1' to enable interrupt for event ADDRESS

RW

PAYLOAD

Write '1' to enable interrupt for event PAYLOAD

RW

END

Write '1' to enable interrupt for event END

RW

DISABLED

Write '1' to enable interrupt for event DISABLED

RW

DEVMATCH

Write '1' to enable interrupt for event DEVMATCH

RW

DEVMISS

Write '1' to enable interrupt for event DEVMISS

RW

RSSIEND

Write '1' to enable interrupt for event RSSIEND

A new RSSI sample is ready for readout from the RADIO.RSSISAMPLE register

RW

BCMATCH

Write '1' to enable interrupt for event BCMATCH

Bit counter value is specified in the RADIO.BCC register

RW

CRCOK

Write '1' to enable interrupt for event CRCOK

RW

CRCERROR

Write '1' to enable interrupt for event CRCERROR

RW

FRAMESTART

Write '1' to enable interrupt for event FRAMESTART

RW

EDEND

Write '1' to enable interrupt for event EDEND

RW

EDSTOPPED

Write '1' to enable interrupt for event EDSTOPPED

RW

CCAIDLE

Write '1' to enable interrupt for event CCAIDLE

RW

CCABUSY

Write '1' to enable interrupt for event CCABUSY

RW

CCASTOPPED

Write '1' to enable interrupt for event CCASTOPPED

RW

RATEBOOST

Write '1' to enable interrupt for event RATEBOOST

RW

TXREADY

Write '1' to enable interrupt for event TXREADY

RW

RXREADY

Write '1' to enable interrupt for event RXREADY

RW

MHRMATCH

Write '1' to enable interrupt for event MHRMATCH

RW

SYNC

Write '1' to enable interrupt for event SYNC

A possible preamble has been received in Ble_LR125Kbit, Ble_LR500Kbit, or Ieee802154_250Kbit modes during an RX transaction. False triggering of the event is possible.

RW

PHYEND

Write '1' to enable interrupt for event PHYEND

RW

CTEPRESENT

Write '1' to enable interrupt for event CTEPRESENT