System OFF is the deepest power-saving mode the system can enter. In this mode, the system's core functionality is powered down and all ongoing tasks are terminated.
The device is put into System OFF mode using the register SYSTEMOFF . The following initiate a wakeup from System OFF:
- The DETECT signal, generated by the GPIO peripheral
- The ANADETECT signal, generated by the LPCOMP peripheral
- The SENSE signal, generated by the NFCT peripheral to wake-on-field
- A valid USB voltage on the VBUS pin is detected
- A debug session is started
- A pin reset
When the device wakes up from System OFF, a system reset is performed. For more details, see Application core reset behavior.
One or more RAM sections can be retained in System OFF depending on the RAM retention settings in the peripheral VMC — Volatile memory controller.
Before entering System OFF, the EasyDMA enabled peripheral must not active when entering System OFF. It is also recommended that the network core is in IDLE state, meaning peripherals are stopped and the CPU is idle.