RNG SRAM

nRF5340 Product Specification

The 2 kB SRAM memory connected to the RNG engine can be used for storing a large pool of random entropy.

The RNG SRAM memory is not directly mapped to the device memory map. Instead, any read or write operation using word granularity to this memory region must be done using RNG SRAM interface. Larger payloads than word granularity can be processed using the DIN DMA engine and DOUT DMA engine.

Before any RNG SRAM read or write transaction can be performed, the CRYPTOCELL must be enabled.

Writing data to the RNG SRAM involves the following steps:

  1. Set the Address Offset: Specify the starting byte address for writing by setting register SRAM_ADDR. An offset value of 0x0 points to the first 32-bits word in the RNG SRAM memory. An offset value of 0x10 points to the fourth 32-bits word in the RNG SRAM memory.

  2. Write Data: When register SRAM_DATA_READY indicates DMA engine is idle, data is written to register SRAM_DATA. The address will automatically increment after each write, allowing writes to the next word without needing to set the offset again.

Reading data from the RNG SRAM involves the following steps:

  1. Set the Read Address: Specify the starting byte address for reading by setting register SRAM_ADDR

  2. Discard first read: Read and discard the first value from register SRAM_DATA, as it will contain the previous value pointed to by register SRAM_ADDR.

  3. Read Data: When register SRAM_DATA_READY indicates DMA engine is idle, retrieve the data from register SRAM_DATA. Similar to the write address, the read address will auto-increment with each read, setting it to the next word.

Note: Once the address register reaches the last RNG SRAM address, the automatic address incrementation halts. Any subsequent read or write transaction will cause the DMA engine to continue operating on the last 32-bits word in the RNG SRAM memory.