RNG_ISR

Address offset: 0x104

Interrupt status register. Each bit of this register holds the interrupt status of a single interrupt source. If corresponding RNG_IMR bit is unmasked, an interrupt is generated.


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																														F	E	D	C	B	A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	R	EHR_VALID_INT										192-bits have been collected and are ready to be read.
B	R	AUTOCORR_ERR_INT										Autocorrelation error. Failure occurs when autocorrelation test has failed four times in a row. Once set, the TRNG ceases to function until next reset.
C	R	CRNGT_ERR_INT										Continuous random number generator test error. Failure occurs when two consecutive blocks of 16 collected bits are equal.
D	R	VNC_ERR_INT										von Neumann corrector error. Failure occurs if 32 consecutive collected bits are identical, ZERO, or ONE.
E	R	WATCHDOG_INT										Maximum number of CPU clock cycles per sample have been exceeded. See RNG_WATCHDOG_VAL for more information.
F	R	DMA_DONE_INT										RNG DMA to SRAM is completed.