Cryptographic flow

        
        /* Enable CRYPTOCELL and its PKA engine */
        NRF_CRYPTOCELL->ENABLE = CRYPTOCELL_ENABLE_ENABLE_Enabled;
        NRF_CC_MISC->PKA_CLK = CC_MISC_PKA_CLK_ENABLE_Enable;
    
        /* Define the operand bit size as 2048 */
        NRF_CC_PKA->PKA_L[1] = 0x800;
    
        /* Define the 32-bits PKA SRAM address of the selected R4 and R5 */
        NRF_CC_PKA->MEMORY_MAP[4] = 0x108;
        NRF_CC_PKA->MEMORY_MAP[5] = 0x14A;
    
        /* Initialize the SRAM registers with one word of data */
        NRF_CC_PKA->PKA_SRAM_WADDR = NRF_CC_PKA->MEMORY_MAP[4];
        NRF_CC_PKA->PKA_SRAM_WDATA = 0x5;
        NRF_CC_PKA->PKA_SRAM_WADDR = NRF_CC_PKA->MEMORY_MAP[5];
        NRF_CC_PKA->PKA_SRAM_WDATA = 0x2;
    
        /* Execute subtract, OPCODE SubDecNeg: R4 = R4 - R5 */
        NRF_CC_PKA->OPCODE =
            (4 << CC_PKA_OPCODE_REG_R_Pos) |
            (5 << CC_PKA_OPCODE_REG_B_Pos) |
            (4 << CC_PKA_OPCODE_REG_A_Pos) |
            (1 << CC_PKA_OPCODE_LEN_Pos)   |
            (CC_PKA_OPCODE_OPCODE_SubDecNeg << CC_PKA_OPCODE_OPCODE_Pos);
    
        /* Wait for operation to complete, result will be in R4 */
        while (!NRF_CC_PKA->PKA_DONE) { }
        
        

• All PKA SRAM registers, including the special virtual registers N, Np, T0, and T1, have been cleared before the operation is run.
• The operation is using index 1 in register PKA_L[n] (n=0..7), which is set to accommodate an operand size of 2048 bits.
• Register R4 and R5 have been selected to run this operation. Register R4 is used both as the operand A register and the result register.
• The memory map is configured to allow operands of 2048 bits plus an additional 64 bits for the internal PKA engine calculations. The configuration of the MEMORY_MAP[n] (n=0..31) for virtual register N, Np, T0, and T1 is not included in the example. The memory map is thus configured with 66 words per register, leading to the following: