OPCODE overview

Supported PKA operation codes and the corresponding required virtual register configurations.

Table 3. PKA OPCODE descriptions
OPCODE	Operation
Terminate	Terminate ongoing PKA operation
AddInc	Add or Increment ADD: `REG_R = REG_A + REG_B` INC: `REG_R = REG_A + 0x1`, when `REG_B` and `CONST_B` are 0x1
SubDecNeg	Subtract, Decrement, or Negate SUB: `REG_R = REG_A - REG_B` DEC: `REG_R = REG_A - 0x1`, when `REG_B` and `CONST_B` are 0x1 NEG: `REG_R = 0x0 - REG_B`, when `REG_A` is 0x0 and `CONST_A` is 0x1
ModAddInc	Modular Add or Modular Increment ModADD: `REG_R = (REG_A + REG_B) % REG_N` ModINC: `REG_R = (REG_A + 0x1) % REG_N`, when `REG_B` and `CONST_B` are 0x1
ModSubDecNeg	Modular Subtract, Modular Decrement, or Modular Negate ModSUB: `REG_R = (REG_A - REG_B) % REG_N` ModDEC: `REG_R = (REG_A - 0x1) % REG_N`, when `REG_B` and `CONST_B` is 0x1 ModNEG: `REG_R = (0x0 - REG_B) % REG_N`, when `REG_A` is 0x0
ANDTST0CLR0	And, Test bit 0, or Clear AND: `REG_R = REG_A & REG_B` TST0: `REG_R = REG_A & 0x1`, when `REG_B` is 0x1, and `CONST_B` is 0x1 CLR: `REG_R = 0x0`, when `REG_B` is 0x0 and `CONST_B` is 0x1. `REG_A` is ignored.
ORCOPYSET0	Or, Copy, or Set bit 0 OR: `REG_R = REG_A \| REG_B` COPY: `REG_R = REG_A`, when `REG_B` is 0x0 and `CONST_B` is 0x1. SET0: `REG_R = REG_A \| 0x1`, when `REG_B` and `CONST_B` is 0x1.
XORFLP0INVCMP	XOR, Flip bit 0, Invert, or Compare XOR: `REG_R = REG_A XOR REG_B` FLP0: `REG_R = REG_A XOR 0x1`, when `REG_B` and `CONST_B` is 0x1. INV: `REG_R = REG_A XOR 0xFFFFFFFF`, when `REG_B` is 0x1F and `CONST_B` is 0x1. CMP: `REG_A XOR REG_B`, when `DISCARD_R` is 0x1, result of comparison is provided by the `ALU_OUT_ZERO` flag in PKA_STATUS register.
SHR0	Shift right 0. This operation performs a logical right shift on the contents of `REG_A` by a specified number of bit positions and stores the result in `REG_R`. The leftmost bits of `REG_R` that are vacated by the shift operation are filled with zeros. `REG_R = REG_A >> s`, `CONST_B` must be set to 0x1. To perform `s` shifts, `REG_B` should be set to `s - 1` (where `1 <= s <= 31`).
SHR1	Shift right 1. This operation performs a logical right shift on the contents of `REG_A` by a specified number of bit positions and stores the result in `REG_R`. The leftmost bits of `REG_R` that are vacated by the shift operation are filled with ones. `REG_R = REG_A >> s`, `CONST_B` must be set to 0x1. To perform `s` shifts, `REG_B` should be set to `s - 1` (where `1 <= s <= 31`).
SHL0	Shift left 0. This operation performs a logical left shift on the contents of `REG_A` by a specified number of bit positions and stores the result in `REG_R`. The leftmost bits of `REG_R` that are vacated by the shift operation are filled with zeros. `REG_R = REG_A << s`, `CONST_B` must be set to 0x1. To perform `s` shifts, `REG_B` should be set to `s - 1` (where `1 <= s <= 31`).
SHL1	Shift left 1. This operation performs a logical left shift on the contents of `REG_A` by a specified number of bit positions and stores the result in `REG_R`. The leftmost bits of `REG_R` that are vacated by the shift operation are filled with ones. `REG_R = REG_A << s`, `CONST_B` must be set to 0x1. To perform `s` shifts, `REG_B` should be set to `s - 1` (where `1 <= s <= 31`).
MulLow	Multiply Low. This operation performs a multiplication of the values in `REG_A` and `REG_B` and stores the result in the destination register `REG_R`. Any bits of the product that exceed the operand size are discarded, effectively keeping only the least significant bits (LSBs) that fit within the operand size. `REG_R = (REG_A * REG_B) & operand size mask`
ModMul	Modular Multiply. `REG_R = (REG_A * REG_B) % REG_N`
ModMulN	The output of this operation is a number that is potentially larger than the modulus `N`, but guaranteed to be smaller than `2N`. Assuming `REG_A` and `REG_B` are already reduced modulo `N` or are less than `N`, the operation is simply `REG_R = (REG_A * REG_B)`.
ModExp	Modular Exponentiation. `REG_R = (REG_A ^ REG_B) % REG_N`
Division	Integer Division. This operation performs integer division of the value in `REG_A` by the value in `REG_B`. The quotient of the division is stored in `REG_R`, and the remainder is stored back in `REG_A`. `REG_R = REG_A / REG_B` `REG_A = REG_A % REG_B` If `REG_B` is zero (0x0), the operation is invalid, and the divide by zero bit in the status register is set to indicate a division error. Note: PKA division operations with operands larger than 4K bits return erroneous results.
ModInv	Modular Inversion. `REG_R = 1/REG_B % REG_N`
ModDiv	Modular division is done by calculating the modular inverse of the divisor, check that the inverse value exists by examining the GCD, and then use modular multiplication to multiply the inverse result by the divided. `REG_A = (REG_A * REG_B^(-1)) % REG_N`
MulHigh	Multiply High. This operation multiplies `REG_A` by `REG_B` and captures the high-order bits of the result that exceed the operand size. It places these significant bits, along with an additional `PKA_WORD` number of bits, into the destination register `REG_R`. `REG_R = (REG_A * REG_B) >> operand size`
ModMLAC	Modular Multiplication Acceleration. Performs a modular multiplication and addition. `REG_C` is defined using the operation tag. `REG_R = ((REG_A * REG_B) + REG_C) % REG_N`
ModMLACNR	Modular Multiplication Acceleration No Reduction. Same as ModMLAC, but this omits the final reduction of the result.
Reduction	Reduction. This operation performs a modular reduction, where the result `REG_R` is the remainder of `REG_A` divided by `REG_N`. The length of the operation is flexible and can be chosen based on the specific requirements of the use case. `REG_R = REG_A % REG_N`