Address offset: 0xFE8
Peripheral ID2 Register
The PIDR2 register is part of the set of peripheral identification registers. It contains part of the designer identity and the product revision.
| Bit number | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ID | C | C | C | C | B | A | A | A | |||||||||||||||||||||||||||
| Reset 0x0000000B | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | |||
| ID | R/W | Field | Value ID | Value | Description | ||||||||||||||||||||||||||||||
| A |
R |
DES_1 |
Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the component. |
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|
Arm |
3 |
Arm. Bits[6:4] of the JEDEC JEP106 Identity Code |
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| B |
R |
JEDEC |
Always 1. Indicates that the JEDEC-assigned designer ID is used. |
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| C |
R |
REVISION |
Peripheral revision |
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|
Rev0p0 |
0 |
This device is at r0p0 |
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