The I2S module supports both transmission (TX) and reception (RX) of serial data. In both cases the serial data is shifted synchronously to the clock signals SCK and LRCK.
TX data is written to the SDOUT pin on the falling edge of SCK, and RX data is read from the SDIN pin on the rising edge of SCK. The most significant bit (MSB) is always transmitted first.
TX and RX are available in both Master and Slave modes and can be enabled/disabled independently in the CONFIG.TXEN and CONFIG.RXEN.
Transmission and/or reception is started by triggering the START task. With transmission enabled in CONFIG.TXEN), the TXPTRUPD event will be generated for every number of transmitted data words given by RXTXD.MAXCNT. Each data word contains one or more samples. The TXPTRUPD event is generated just before MAXCNT number of data words have been transmitted. Similarly, with reception enabled in CONFIG.RXEN, the RXPTRUPD event will be generated for every received data word given by RXTXD.MAXCNT. The RXPTRUPD event is generated just after MAXCNT number of data words have been received.
| SWIDTH | MAXCNT restriction |
|---|---|
| 24Bit | Only even numbers (2,4,6, etc) |
| 32 | Only even numbers (2, 4, 6, etc) |
| 24BitIn32 | Only even numbers (2, 4, 6, etc) |