Instances
| Instance | Domain | Base address | TrustZone | Split access | Description | ||
|---|---|---|---|---|---|---|---|
| Map | Att | DMA | |||||
|
DPPIC : S |
APPLICATION |
0x50017000 |
US | S | NA | Yes |
DPPI controller |
| DPPIC | NETWORK | 0x4100F000 | HF | NS | NA | No |
DPPI controller |
Configuration
| Instance | Domain | Configuration |
|---|---|---|
|
DPPIC : S |
APPLICATION |
32 DPPI channels |
| DPPIC | NETWORK |
32 DPPI channels |
Register overview
| Register | Offset | TZ | Description |
|---|---|---|---|
| TASKS_CHG[n].EN | 0x000 |
Enable channel group n |
|
| TASKS_CHG[n].DIS | 0x004 |
Disable channel group n |
|
| SUBSCRIBE_CHG[n].EN | 0x080 |
Subscribe configuration for task CHG[n].EN |
|
| SUBSCRIBE_CHG[n].DIS | 0x084 |
Subscribe configuration for task CHG[n].DIS |
|
| CHEN | 0x500 |
Channel enable register |
|
| CHENSET | 0x504 |
Channel enable set register |
|
| CHENCLR | 0x508 |
Channel enable clear register |
|
| CHG[n] | 0x800 |
Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled |