The MISC interface controls clocks for the individual engines within the CRYPTOCELL subsystem.
Each cryptographic engine has an individual register for performing clock gating. Engine clock status is displayed in register CLK_STATUS.
Clock control for the GHASH engine is handled by enabling clock for the HASH engine, and then selecting GHASH engine in register HASH_SELECT.
Note:
Clock control for the RNG engine is handled by register
RNG_CLK and not through the MISC interface.