CPU and support module configuration

nRF5340 Product Specification

The Arm Cortex®-M33 processor has a number of CPU options and support modules implemented on the device.

Option/Module Description Implemented
Core options
PRIORITIES Priority bits 3
WIC Wakeup Interrupt Controller NO
Endianness Memory system endianness Little endian
DWT Data Watchpoint and Trace YES
Modules
MPU Number of non-secure MPU regions 8
Number of secure MPU regions 8
SAU Number of SAU regions 0

See SPU for more information about secure regions.

FPU Floating-point unit YES
DSP Digital Signal Processing Extension YES
Arm TrustZone® for Armv8-M Armv8-M Security Extensions YES
CPIF Coprocessor interface NO
ETM Embedded Trace Macrocell YES
ITM Instrumentation Trace Macrocell YES
MTB Micro Trace Buffer NO
CTI Cross Trigger Interface YES
BPU Breakpoint Unit YES
HTM AHB Trace Macrocell NO