STATUS

Address offset: 0x440

Status from last transaction

Individual bits are cleared by writing a '1' to the bits that shall be cleared.


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																																		B	A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	OVERREAD										TX buffer over-read detected, and prevented
			NotPresent	0								Read: error not present
			Present	1								Read: error present
			Clear	1								Write: clear error on writing '1'
B	RW	OVERFLOW										RX buffer overflow detected, and prevented
			NotPresent	0								Read: error not present
			Present	1								Read: error present
			Clear	1								Write: clear error on writing '1'