Clock output

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

The GRTC can be configured to output the clock on a pin.

The following clocks can be configured to be output on pins:
  • LFCLK (32 KHz clock) output
  • Divided 16M Hz clock (fast clock) output

The clock outputs can be enabled or disabled using CLKOUT.

The 16 MHz clock is divided before it is output on a pin. The divisor can be configured in CLKCFG, where clock output is (fast clock) / (CLKCFG.CLKFASTDIV * 2). The CLKCFG.CLKFASTDIV should be changed only when CLKOUT.CLKOUTFAST is disabled.

When updating the configuration registers CLKCFG and CLKOUT, a delay of a few LFCLK cycles may occur before the configuration takes effect. The STATUS.CLKOUT.READY register indicates whether the GRTC is busy updating the configuration:
  • Busy: Configuration is in progress.
  • Ready: Safe to update configuration.
Always check STATUS.CLKOUT.READY before making changes to CLKCFG or CLKOUT. The EVENTS_CLKOUTREADY event is generated when the STATUS.CLKOUT.READY status changes from busy to ready.

The LFCLK clock is output also when the device is in System OFF mode.

For the clock output pin mapping, see Pin assignments. GRTC uses standard output drive strength for clock output.