TAMPC reset behavior

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

TAMPC registers are reset by different sources.

Protected signals in TAMPC are divided into the following reset source categories.
  • Category 1 – Brownout reset, power-on reset
  • Category 2 – Pin reset and TAMPC reset
  • Category 3 – Watchdog timer reset, CPU lockup reset, System reset request, and Wake-up from System OFF reset
For more information about reset sources, see RESET — Reset control.
Table 2. TAMPC protected signals
Reset source
Register Function Reset value Cat 1 Cat 2 Cat 3
PROTECT.DOMAIN[0].DBGEN Allow invasive debugging in non-secure mode of Arm Cortex-M33. 0 x x
PROTECT.DOMAIN[0].NIDEN Allow non-invasive debugging in non-secure mode of Arm Cortex-M33. 0 x x
PROTECT.DOMAIN[0].SPIDEN Allow invasive debugging in secure mode of Arm Cortex-M33. 0 x x
PROTECT.DOMAIN[0].SPNIDEN Allow non-invasive debugging in secure mode of Arm Cortex-M33. 0 x x
PROTECT.AP[0].DBGEN Allow debugging of FLPR RISC-V CPU. 0 x x
PROTECT.ACTIVESHIELD Enable active shield detector. 0 x x x
PROTECT.CRACENTAMP Enable CRACEN tamper detector. 1 x x x
PROTECT.GLITCHSLOWDOMAIN Enable slow domain glitch detector. 1 x x x
PROTECT.GLITCHFASTDOMAIN Enable fast domain glitch detector. 1 x x x
PROTECT.EXTRESETEN Enable automatic reset from external tamper detectors events. 0 x x x
PROTECT.INTRESETEN Enable automatic reset from internal tamper detector events. 1 x x x
PROTECT.ERASEPROTECT Allow device erase using CTRL-AP and RRAMC. 0 x x x