While the nRESET pin is asserted (falling edge and held low), GPIO pins will enter one of two states:
- Retain their current configuration (e.g., outputs remain outputs, inputs remain inputs)
- Switch to high impedance, which is the default state upon device startup
Once nRESET is deasserted (rising edge), all GPIOs transition to the high impedance state until device firmware configures them.
When GPIO pins are in a high-impedance state for a prolonged period, external circuits that depend on a clearly defined logic level (either high or low) might require the use of external pull-up or pull-down resistors to ensure reliable operation. However, in most cases this is not required, as the duration of the high-impedance state during the reset cycle is typically very short.