TCONTROL

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

Address offset: 0x7A5

Trigger Control

This optional register is one solution to a problem regarding triggers with action=0 firing in M-mode trap handlers

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW

MTE

Mode Trigger Enable

DONTMATCH

0

Triggers with action=0 do not match/fire while the hart is in M-mode

MATCH

1

Triggers do match/fire while the hart is in M-mode. When a trap into M-mode is taken, mte is set to 0. When mret is executed, mte is set to the value of mpte

B

RW

MPTE

Mode Previous Trigger Enable

When a trap into M-mode is taken, mpte is set to the value of mte