Instances
| Instance | Domain | Base address | TrustZone | Split access | Description | ||
|---|---|---|---|---|---|---|---|
| Map | Att | DMA | |||||
|
I2S20 : S |
GLOBAL |
0x500DD000 |
US | S | SA | No |
Inter-IC sound interface I2S20 |
Configuration
| Instance | Domain | Configuration |
|---|---|---|
|
I2S20 : S |
GLOBAL |
Available GPIO port: P1 |
Register overview
| Register | Offset | TZ | Description |
|---|---|---|---|
| TASKS_START | 0x000 |
Starts continuous I2S transfer. Also starts MCK generator when this is enabled |
|
| TASKS_STOP | 0x004 |
Stops I2S transfer and MCK generator. Triggering this task will cause the event STOPPED to be generated. |
|
| SUBSCRIBE_START | 0x080 |
Subscribe configuration for task START |
|
| SUBSCRIBE_STOP | 0x084 |
Subscribe configuration for task STOP |
|
| EVENTS_RXPTRUPD | 0x104 |
The RXD.PTR register has been copied to internal double-buffers. When the I2S module is started and RX is enabled, this event will be generated for every ceil(RXTXD.MAXCNT/4) words received on the SDIN pin. |
|
| EVENTS_STOPPED | 0x108 |
I2S transfer stopped. |
|
| EVENTS_TXPTRUPD | 0x114 |
The TDX.PTR register has been copied to internal double-buffers. When the I2S module is started and TX is enabled, this event will be generated for every ceil(RXTXD.MAXCNT/4) words that are sent on the SDOUT pin. |
|
| EVENTS_FRAMESTART | 0x11C |
Frame start event, generated on the active edge of LRCK |
|
| PUBLISH_RXPTRUPD | 0x184 |
Publish configuration for event RXPTRUPD |
|
| PUBLISH_STOPPED | 0x188 |
Publish configuration for event STOPPED |
|
| PUBLISH_TXPTRUPD | 0x194 |
Publish configuration for event TXPTRUPD |
|
| PUBLISH_FRAMESTART | 0x19C |
Publish configuration for event FRAMESTART |
|
| INTEN | 0x300 |
Enable or disable interrupt |
|
| INTENSET | 0x304 |
Enable interrupt |
|
| INTENCLR | 0x308 |
Disable interrupt |
|
| ENABLE | 0x500 |
Enable I2S module |
|
| CONFIG.MODE | 0x504 |
I2S mode |
|
| CONFIG.RXEN | 0x508 |
Reception (RX) enable |
|
| CONFIG.TXEN | 0x50C |
Transmission (TX) enable |
|
| CONFIG.MCKEN | 0x510 |
Master clock generator enable |
|
| CONFIG.MCKFREQ | 0x514 |
I2S clock generator control |
|
| CONFIG.RATIO | 0x518 |
MCK / LRCK ratio |
|
| CONFIG.SWIDTH | 0x51C |
Sample width |
|
| CONFIG.ALIGN | 0x520 |
Alignment of sample within a frame |
|
| CONFIG.FORMAT | 0x524 |
Frame format |
|
| CONFIG.CHANNELS | 0x528 |
Enable channels |
|
| RXD.PTR | 0x538 |
Receive buffer RAM start address. |
|
| TXD.PTR | 0x540 |
Transmit buffer RAM start address |
|
| RXTXD.MAXCNT | 0x550 |
Size of RXD and TXD buffers |
|
| PSEL.MCK | 0x560 |
Pin select for MCK signal |
|
| PSEL.SCK | 0x564 |
Pin select for SCK signal |
|
| PSEL.LRCK | 0x568 |
Pin select for LRCK signal |
|
| PSEL.SDIN | 0x56C |
Pin select for SDIN signal |
|
| PSEL.SDOUT | 0x570 |
Pin select for SDOUT signal |
|
| CHANNEL[n].TERMINATEONBUSERROR | 0x580 |
Terminate the transaction if a BUSERROR event is detected. |
|
| CHANNEL[n].BUSERRORADDRESS | 0x584 |
Address of transaction that generated the last BUSERROR event. |