CPUC — CPU control

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CPUC controls elements of the Arm® Cortex®-M33 processor such as enabling floating-point exceptions. It is also able to lock certain features of the CPU and prevent them from being modified.

CPUC can generate events and CPU interupts for exceptions in the floating point unit (FPU), as shown in the following block diagram. Examples of such exceptions are divide-by-zero or floating-point overflow.
Figure 1. Block diagram
Page-1 Rectangle CPUC CPUC Event Dynamic connector Sheet.11 FPUIOC FPUIOC Event.12 Dynamic connector Sheet.14 FPUDZC FPUDZC Event.15 Dynamic connector Sheet.17 FPUOFC FPUOFC Event.18 Dynamic connector Sheet.20 FPUUFC FPUUFC Event.21 Dynamic connector Sheet.23 FPUIXC FPUIXC Event.24 Dynamic connector Sheet.26 FPUIDC FPUIDC Sheet.50 EVENTS EVENTS Nordic Middle Grey Arm Cortex-M33 Arm Cortex-M33 Nordic Middle Grey.52 FPU FPU

CPUC holds a CPU identifier CPUID, used in the system to uniquely identify the processing unit of a core.

In addition, CPUC holds a LOCK register, which is used to lock certain CPU features and prevent them from being modified. One example is the LOCK.LOCKSAU field. When set to Locked, this prevents further modifications to the SAU registers.