SW-DP

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

Symbol Description Min. Typ. Max. Units
Rpull

Internal SWDIO and SWDCLK pull up/down resistance

14
fSWDCLK

SWDCLK frequency

0.125 8 MHz
tSUI

SWDIO input setup before SWDCLK

20 ns
tHK

SWDIO input hold after SWDCLK

1 ns
tVO

SWDCLK to SWDIO output valid

36 ns
tHO

SWDIO output hold after SWDCLK

5 ns
Figure 1. SWD timing diagram
SWD timing diagram