Registers

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

Instances

Instance Domain Base address TrustZone Split access Description
Map Att DMA

PWM20 : S
PWM20 : NS

GLOBAL

0x500D2000
0x400D2000

US S SA No

Pulse width modulation unit PWM20

PWM21 : S
PWM21 : NS

GLOBAL

0x500D3000
0x400D3000

US S SA No

Pulse width modulation unit PWM21

PWM22 : S
PWM22 : NS

GLOBAL

0x500D4000
0x400D4000

US S SA No

Pulse width modulation unit PWM22

Configuration

Instance Domain Configuration

PWM20 : S
PWM20 : NS

GLOBAL

Use GPIO port P1

IDLEOUT register is available.

EVENTS_COMPAREMATCH events are available.

CURRENTAMOUNT register included.

PWM21 : S
PWM21 : NS

GLOBAL

Use GPIO port P1

IDLEOUT register is available.

EVENTS_COMPAREMATCH events are available.

CURRENTAMOUNT register included.

PWM22 : S
PWM22 : NS

GLOBAL

Use GPIO port P1

IDLEOUT register is available.

EVENTS_COMPAREMATCH events are available.

CURRENTAMOUNT register included.

Register overview

Register Offset TZ Description
TASKS_STOP 0x004

Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback

TASKS_NEXTSTEP 0x008

Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running.

TASKS_DMA.SEQ[n].START 0x010

Starts operation using easyDMA to load the values. See peripheral description for operation using easyDMA.

TASKS_DMA.SEQ[n].STOP 0x014

Stops operation using easyDMA. This does not trigger an END event.

SUBSCRIBE_STOP 0x084

Subscribe configuration for task STOP

SUBSCRIBE_NEXTSTEP 0x088

Subscribe configuration for task NEXTSTEP

SUBSCRIBE_DMA.SEQ[n].START 0x090

Subscribe configuration for task START

SUBSCRIBE_DMA.SEQ[n].STOP 0x094

Subscribe configuration for task STOP

EVENTS_STOPPED 0x104

Response to STOP task, emitted when PWM pulses are no longer generated

EVENTS_SEQSTARTED[n] 0x108

First PWM period started on sequence n

EVENTS_SEQEND[n] 0x110

Emitted at end of every sequence n, when last value from RAM has been applied to wave counter

EVENTS_PWMPERIODEND 0x118

Emitted at the end of each PWM period

EVENTS_LOOPSDONE 0x11C

Concatenated sequences have been played the amount of times defined in LOOP.CNT

EVENTS_RAMUNDERFLOW 0x120

Emitted when retrieving from RAM does not complete in time for the PWM module

EVENTS_DMA.SEQ[n].END 0x124

Generated after all MAXCNT bytes have been transferred

EVENTS_DMA.SEQ[n].READY 0x128

Generated when EasyDMA has buffered the .PTR and .MAXCNT registers for the channel, allowing them to be written to prepare for the next sequence.

EVENTS_DMA.SEQ[n].BUSERROR 0x12C

An error occured during the bus transfer.

EVENTS_COMPAREMATCH[n] 0x13C

This event is generated when the compare matches for the compare channel [n].

PUBLISH_STOPPED 0x184

Publish configuration for event STOPPED

PUBLISH_SEQSTARTED[n] 0x188

Publish configuration for event SEQSTARTED[n]

PUBLISH_SEQEND[n] 0x190

Publish configuration for event SEQEND[n]

PUBLISH_PWMPERIODEND 0x198

Publish configuration for event PWMPERIODEND

PUBLISH_LOOPSDONE 0x19C

Publish configuration for event LOOPSDONE

PUBLISH_RAMUNDERFLOW 0x1A0

Publish configuration for event RAMUNDERFLOW

PUBLISH_DMA.SEQ[n].END 0x1A4

Publish configuration for event END

PUBLISH_DMA.SEQ[n].READY 0x1A8

Publish configuration for event READY

PUBLISH_DMA.SEQ[n].BUSERROR 0x1AC

Publish configuration for event BUSERROR

PUBLISH_COMPAREMATCH[n] 0x1BC

Publish configuration for event COMPAREMATCH[n]

SHORTS 0x200

Shortcuts between local events and tasks

INTEN 0x300

Enable or disable interrupt

INTENSET 0x304

Enable interrupt

INTENCLR 0x308

Disable interrupt

INTPEND 0x30C

Pending interrupts

ENABLE 0x500

PWM module enable register

MODE 0x504

Selects operating mode of the wave counter

COUNTERTOP 0x508

Value up to which the pulse generator counter counts

PRESCALER 0x50C

Configuration for PWM_CLK

DECODER 0x510

Configuration of the decoder

LOOP 0x514

Number of playbacks of a loop

IDLEOUT 0x518

Configure the output value on the PWM channel during idle

SEQ[n].REFRESH 0x528

Number of additional PWM periods between samples loaded into compare register

SEQ[n].ENDDELAY 0x52C

Time added after the sequence

PSEL.OUT[n] 0x560

Output pin select for PWM channel n

DMA.SEQ[n].PTR 0x704

RAM buffer start address

DMA.SEQ[n].MAXCNT 0x708

Maximum number of bytes in channel buffer

DMA.SEQ[n].AMOUNT 0x70C

Number of bytes transferred in the last transaction, updated after the END event.

DMA.SEQ[n].CURRENTAMOUNT 0x710

Number of bytes transferred in the current transaction

DMA.SEQ[n].TERMINATEONBUSERROR 0x71C

Terminate the transaction if a BUSERROR event is detected.

DMA.SEQ[n].BUSERRORADDRESS 0x720

Address of transaction that generated the last BUSERROR event.