The device implements detectors to protect selected signals that control critical device features.
- A TAMPC event is generated.
- A chip reset is triggered and the SECTAMPER value in the reset reason register indicates what happened, depending on the status of the register PROTECT.INTRESETEN.CTRL.
The INTRESETEN register is enabled from reset. The PROTECT.<component>.STATUS registers indicate which protected signal had an unintentional value change when the register INTENRESETEN is disabled.
- Initial register write to clear the write protection.
- Register write to change the signal's value.
Write Clear to the WRITEPROTECTION field in the PROTECT.<component>.CTRL register to clear the write protection in the first register write. Then write to the VALUE and LOCK fields in the next register write operation.
The write protection is automatically re-enabled after the subsequent write to change the VALUE field when the register write does not include the Clear value in the WRITEPROTECTION field.
The LOCK field controls a lock feature which prevents further updates to the VALUE and LOCK fields until a reset with the required reset source for the specific signal is issued.
- Register write does not have the correct write key
- Write protection is active and the write operation does not contain the value to clear the write protection
- The lock is enabled
- Write Clear to the WRITEPROTECTION field and KEY to the KEY field.
- Write Disabled to the WRITEPROTECTION field, KEY to the KEY field, and KEY to the desired LOCK and VALUE fields.