Registers

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

Instances

Instance Domain Base address TrustZone Split access Description
Map Att DMA
CRACEN GLOBAL 0x50048000 HF S NSA No

Crypto accelerator

Configuration

Instance Domain Configuration
CRACEN GLOBAL

Access to CRACEN registers is blocked while KMU is performing a PUSH operation. CRACEN cannot write RRAM.

CRACEN CRYPTOACCELERATOR specific configuration registers included

PKE data (address 0x51808000) must be read and written using aligned access, i.e. using an operation where a word-aligned address is used for a word, or a halfword-aligned address is used for a halfword access.

PKE code (address 0x5180C000) must be read and written using aligned access, i.e. using an operation where a word-aligned address is used for a word, or a halfword-aligned address is used for a halfword access.

Register overview

Register Offset TZ Description
EVENTS_CRYPTOMASTER 0x100

Event indicating that interrupt triggered at Cryptomaster

EVENTS_RNG 0x104

Event indicating that interrupt triggered at RNG

EVENTS_PKEIKG 0x108

Event indicating that interrupt triggered at PKE or IKG

INTEN 0x300

Enable or disable interrupt

INTENSET 0x304

Enable interrupt

INTENCLR 0x308

Disable interrupt

INTPEND 0x30C

Pending interrupts

ENABLE 0x400

Enable CRACEN peripheral modules.

SEEDVALID 0x404

Marks the SEED register as valid.

SEED[n] 0x410

Seed word [n] for symmetric and asymmetric key generation.

This register is only writable from KMU.

SEEDLOCK 0x440

Lock the access to the SEED register.

PROTECTEDRAMLOCK 0x444

Lock the access to the protected RAM.