RRAM can be read using any natural alignment.
Read and execute operations are cachable through CACHE — Instruction/data cache. For execution performance figures, see CPU.
Low latency mode
The low power register allows making trade-offs between latency and power consumption. By default, RRAMC goes into PowerDown mode, so the wakeup time is variable. To enable a sleep mode with faster wake-up, configure Standby mode using register POWER.LOWPOWERCONFIG.MODE. In combination with Constant Latency sub-power mode, this ensures the lowest latency.