TASKS_TRIGGER[n]

Address offset: 0x000 + (n × 0x4)

VPR task [n] register

If RTPs are not enabled: writes to registers 15..0 are ignored, other read/write accesses operate normally

If RTPs are enabled: reads or writes to these registers will be stalled if there is a simultaneous VPR CSR write access

to any CSR register.


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																																			A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	W	TASKS_TRIGGER										VPR task [n] register If RTPs are not enabled: writes to registers 15..0 are ignored, other read/write accesses operate normally If RTPs are enabled: reads or writes to these registers will be stalled if there is a simultaneous VPR CSR write access to any CSR register.
			Trigger	1								Trigger task