Power and clock management

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

The power and clock management system is optimized for ultra-low power applications to provide maximum power efficiency.

The power and clock management system is shown in the following figure.

Figure 1. Power and clock management
Page-1 Rectangle.4 Rectangle.46 Internal voltage regulators Internal voltage regulators Rectangle.260 External power sources External power sources Rectangle.261 32 MHz crystal 32 MHz crystal Rectangle.263 Internal oscillators Internal oscillators Rectangle.267 Power and clock Power and clock Dynamic connector.294 Rectangle.296 Dynamic connector.302 Rectangle.304 Dynamic connector.306 Dynamic connector.307 Rectangle.309 Optional 32.768 kHz crystal Optional 32.768 kHz crystal Rectangle.312 Dynamic connector.313 Dynamic connector.314 Dynamic connector Dynamic connector.330 Sheet.71 Rounded Rectangle.328 CPU CPU Sheet.73 Sheet.90 Rounded Rectangle.328 Memory Memory Sheet.92 Rounded Rectangle.328 Peripherals Peripherals Sheet.94 Sheet.95 Nordic Middle Grey REGULATORS REGULATORS Nordic Middle Grey.99 OSCILLATORS OSCILLATORS Nordic Middle Grey.100 CLOCK CLOCK Nordic Middle Grey.101 POWER POWER Nordic Middle Grey.102 RESET RESET

The power and clock management system automatically tracks the power and clock resources requested by components in the system at any given time. To achieve the lowest power consumption possible, the system evaluates the requests, starts and stops clock sources, and chooses the most optimal regulator operation modes.

The device start-up sequence after reset is described in RESET — Reset control.