LATCH (Retained)

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

Address offset: 0x020

Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers

This register is retained.

Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A-f

RW

PIN[i] (i=0..31)

Status on whether PINi has met criteria set in PIN_CNF[i].SENSE register. Write '1' to clear.

NotLatched

0

Criteria has not been met

Latched

1

Criteria has been met