CRYPTMSTRDMA.CONFIG

Address offset: 0x034

Cryptomaster configuration


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID																															E	D	C	B	A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	FETCHCTRLINDIRECT										Fetcher scatter/gather. When this bit is zero, the fetcher runs in direct mode. When this bit is one, the fetcher runs in scatter-gather mode.
B	RW	PUSHCTRLINDIRECT										Pusher scatter/gather. When this bit is zero, the pusher runs in direct mode. When this bit is one, the pusher runs in scatter-gather mode.
C	RW	FETCHSTOP										Stop fetcher. When this bit is high, the fetcher will stop at the end of the current block (even if the STOP bit in the descriptor is low).
D	RW	PUSHSTOP										Stop pusher DMA. When this bit is high, the pusher will stop at the end of the current block (even if the STOP bit in the descriptor is low).
E	RW	SOFTRST										Soft reset the cryptomaster. When this bit is high, the software reset of the DMA modules, the FIFO's and the processing module will be activated. The bus is not affected (pending transfers will be completed).