Registers

nRF54LM20A | nRF54LM20B Datasheet

Instances

Instance Domain Base address TrustZone Split access Description
Map Att DMA

GPIOTE20 : S
GPIOTE20 : NS

GLOBAL

0x500DA000
0x400DA000

US S NA Yes

8 channels and 2 interrupts for GPIO port P1 and P3

GPIO tasks and events GPIOTE20

GPIOTE30 : S
GPIOTE30 : NS

GLOBAL

0x5010C000
0x4010C000

US S NA Yes

4 channels and 2 interrupts for GPIO port P0

GPIO tasks and events GPIOTE30

Configuration

Instance Domain Configuration

GPIOTE20 : S
GPIOTE20 : NS

GLOBAL

Number of GPIOTE channels: 0..7

Number of GPIOTE port events: 0..0

Number of GPIOTE interrupts: 0..1

GPIOTE30 : S
GPIOTE30 : NS

GLOBAL

Number of GPIOTE channels: 0..3

Number of GPIOTE port events: 0..0

Number of GPIOTE interrupts: 0..1

Register overview

Register Offset TZ Description
TASKS_OUT[n] 0x000

Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.

TASKS_SET[n] 0x030

Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.

TASKS_CLR[n] 0x060

Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.

SUBSCRIBE_OUT[n] 0x080

Subscribe configuration for task OUT[n]

SUBSCRIBE_SET[n] 0x0B0

Subscribe configuration for task SET[n]

SUBSCRIBE_CLR[n] 0x0E0

Subscribe configuration for task CLR[n]

EVENTS_IN[n] 0x100

Event from pin specified in CONFIG[n].PSEL

EVENTS_PORT[n].NONSECURE 0x140 NS

Non-secure port event

EVENTS_PORT[n].SECURE 0x144 S

Secure port event

PUBLISH_IN[n] 0x180

Publish configuration for event IN[n]

PUBLISH_PORT[n].NONSECURE 0x1C0 NS

Publish configuration for event PORT[n].NONSECURE

PUBLISH_PORT[n].SECURE 0x1C4 S

Publish configuration for event PORT[n].SECURE

INTENSET0 0x304

Enable interrupt

INTENCLR0 0x308

Disable interrupt

INTENSET1 0x314

Enable interrupt

INTENCLR1 0x318

Disable interrupt

CONFIG[n] 0x510

Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event