The cryptographic accelerator engine (CRACEN) implements a separate tamper detector mechanism. This tamper detector is always enabled.
CRACEN has security countermeasures and notifies TAMPC if tampering is detected during its operations. TAMPC will
react according to the register setting in PROTECT.CRACENTAMP.CTRL and one of the following will occur:
- A TAMPC event is generated.
- A chip reset is triggered and the SECTAMPER value in the reset reason register indicates what happened, depending on the status of the register PROTECT.INTRESETEN.CTRL.
The internal tamper reset enable signal INTRESETEN is enabled from reset.
For more information about CRACEN countermeasures, see CRACEN — Cryptographic accelerator engine.