GOTGINT

Address offset: 0x004

Interrupt Register

The application reads this register whenever there is an OTG interrupt and clears the bits in this register to clear the OTG interrupt.


Bit number				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
ID															G	F	E	D								C	B						A
Reset 0x00000000				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
ID	R/W	Field	Value ID	Value								Description
A	RW	SESENDDET										Mode: Host and Device. Session End Detected (SesEndDet) The controller sets this bit when the utmiotg_bvalid signal is deasserted. This bit can be set only by the core and the application must write 1 to clear it.
			INACTIVE	0								Session is Active
			ACTIVE	1								SessionEnd utmiotg_bvalid signal is deasserted
B	RW	SESREQSUCSTSCHNG										Mode: Host and Device. Session Request Success Status Change (SesReqSucStsChng) The core sets this bit on the success or failure of a session request. The application must read the Session Request Success bit in the OTG Control and Status register (GOTGCTL.SesReqScs) to check for success or failure. This bit can be set only by the core and the application must write 1 to clear it.
			INACTIVE	0								No Change in Session Request Status
			ACTIVE	1								Session Request Status has changed
C	RW	HSTNEGSUCSTSCHNG										Mode: Host and Device. Host Negotiation Success Status Change (HstNegSucStsChng) The core sets this bit on the success or failure of a USB host negotiation request. The application must read the Host Negotiation Success bit of the OTG Control and Status register (GOTGCTL.HstNegScs) to check for success or failure. This bit can be set only by the core and the application must write 1 to clear it.
			INACTIVE	0								No Change
			ACTIVE	1								Host Negotiation Status Change
D	RW	HSTNEGDET										Mode:Host and Device. Host Negotiation Detected (HstNegDet) The core sets this bit when it detects a host negotiation request on the USB. This bit can be set only by the core and the application must write 1 to clear it.
			INACTIVE	0								No Active HNP Request
			ACTIVE	1								Active HNP request detected
E	RW	ADEVTOUTCHG										Mode: Host and Device. A-Device Timeout Change (ADevTOUTChg) The core sets this bit to indicate that the A-device has timed out while waiting for the B-device to connect.This bit can be set only by the core and the application must write 1 to clear it.
			INACTIVE	0								No A-Device Timeout
			ACTIVE	1								A-Device Timeout
F	RW	DBNCEDONE										Mode: Host only. Debounce Done (DbnceDone) The core sets this bit when the debounce is completed after the device connect. The application can start driving USB reset after seeing this interrupt. This bit is only valid when the HNP Capable or SRP Capable bit is SET in the Core USB Configuration register (GUSBCFG.HNPCap or GUSBCFG.SRPCap, respectively). This bit can be set only by the core and the application must write 1 to clear it.
			INACTIVE	0								After Connect waiting for Debounce to complete
			ACTIVE	1								Debounce completed
G	RW	MULTVALIPCHNG										This bit when set indicates that there is a change in the value of at least one ACA pin value. This bit is present only if OTG_BC_SUPPORT=1, otherwise it is reserved.
			NOACAPINCHANGE	0								Indicates there is no change in ACA pin value
			ACAPINCHANGE	1								Indicates there is a change in ACA pin value