SW-DP

nRF54LM20A | nRF54LM20B Datasheet

Symbol Description Min. Typ. Max. Units
Rpull

Internal SWDIO and SWDCLK pull-up/pull-down resistance

14
fSWDCLK

SWDCLK frequency

0.125 20 MHz
tSUI

SWDIO input setup before SWDCLK

17 ns
tHI

SWDIO input hold after SWDCLK

2 ns
tVO

SWDCLK to SWDIO output valid

36 ns
tHO

SWDIO output hold after SWDCLK

4 ns
Figure 17. SWD timing diagram
SWD timing diagram