Address offset: 0x2C
Enables trace unit functionality that prevents trace unit buffer overflows.
Might ignore writes when the trace unit is enabled or not idle.
Must be programmed if TRCIDR3.STALLCTL == 1.
| Bit number | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
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| ID | G | F | E | D | C | B | A | A | A | A | |||||||||||||||||||||||||
| Reset 0x00000000 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |||
| ID | R/W | Field | Value ID | Value | Description | ||||||||||||||||||||||||||||||
| A |
RW |
LEVEL |
[15:0] |
Threshold level field. If LEVEL is nonzero then a trace unit might suppress the generation of: Global timestamps in the instruction trace stream and the data trace stream. Cycle counting in the instruction trace stream, although the cumulative cycle count remains correct. |
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Min |
0 |
Zero invasion. This setting has a greater risk of a FIFO overflow |
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Max |
15 |
Maximum invasion occurs but there is less risk of a FIFO overflow. |
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| B |
RW |
ISTALL |
Instruction stall bit. Controls if a trace unit can stall the PE when the instruction trace buffer space is less than LEVEL. |
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Disabled |
0 |
The trace unit must not stall the PE. |
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Enabled |
1 |
The trace unit can stall the PE. |
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| C |
RW |
DSTALL |
Data stall bit. Controls if a trace unit can stall the PE when the data trace buffer space is less than LEVEL. |
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Disabled |
0 |
The trace unit must not stall the PE. |
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Enabled |
1 |
The trace unit can stall the PE. |
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| D |
RW |
INSTPRIORITY |
Prioritize instruction trace bit. Controls if a trace unit can prioritize instruction trace when the instruction trace buffer space is less than LEVEL. |
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Disabled |
0 |
The trace unit must not prioritize instruction trace. |
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Enabled |
1 |
The trace unit can prioritize instruction trace. A trace unit might prioritize instruction trace by preventing output of data trace, or other means which ensure that the instruction trace has a higher priority than the data trace. |
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| E |
RW |
DATADISCARDLOAD |
Data discard field. Controls if a trace unit can discard data trace elements on a load when the data trace buffer space is less than LEVEL. |
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Disabled |
0 |
The trace unit must not discard any data trace elements. |
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Enabled |
1 |
The trace unit can discard P1 and P2 elements associated with data loads. |
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| F |
RW |
DATADISCARDSTORE |
Data discard field. Controls if a trace unit can discard data trace elements on a store when the data trace buffer space is less than LEVEL. |
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Disabled |
0 |
The trace unit must not discard any data trace elements. |
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Enabled |
1 |
The trace unit can discard P1 and P2 elements associated with data stores. |
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| G |
RW |
NOOVERFLOW |
Trace overflow prevention bit. |
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Disabled |
0 |
Trace overflow prevention is disabled. |
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Enabled |
1 |
Trace overflow prevention is enabled. This might cause a significant performance impact. |
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