GLPMCFG

RW

LPMCAP

LPM-Capable (LPMCap)

The application uses this bit to control the controller LPM capabilities. If the core operates as a non-LPM-capable host, it cannot request the connected device/hub to activate LPM mode. If the core operates as a non-LPM-capable device, it cannot respond to any LPM transactions. If GLPMCFG.LPMCap is 1'b0, the software must not set any of the remaining fields in the GLPMCFG register and these fields must hold their Reset values.

RW

APPL1RES

Mode: Device only. LPM response programmed by application (AppL1Res)

Handshake response to LPM token pre-programmed by device application software. The response depends on GLPMCFG.LPMCap. If GLPMCFG.LPMCap is 1'b0, the core operates as a non-LPM-capable Device and does not respond to any LPM transactions. If GLPMCFG.LPMCap is 1'b1, the core responds as follows: - 1: ACK Even though an ACK is pre-programmed, the core responds with an ACK only on a successful LPM transaction. The LPM transaction is successful if: -- There are no PID/CRC5 errors in both the EXT token and the LPM token (else ERROR) -- A valid bLinkState = 0001B (L1) is received in the LPM transaction (else STALL) -- No data is pending in the Transmit queue (else NYET) - 0: NYET The pre-programmed software bit is overridden for response to LPM token when: -- The received bLinkState is not L1 (STALL response) -- An error is detected in either of the LPM token packets due to corruption (ERROR response).

RW

HIRD

Host-Initiated Resume Duration (HIRD)

EnBESL = 1'b0 Host Initiated Resume Duration. - Host Mode: The value of HIRD to be sent in an LPM transaction. This value is also used to initiate resume for a duration TL1HubDrvResume1 for host-initiated resume. - Device Mode: This field is read only and is updated with the Received LPM Token HIRD bmAttribute when an ACK/NYET/STALL response is sent to an LPM transaction. If HIRD[3:0], EnBESL = 1'b1 Best Effort Service Latency (BESL). - Host Mode: The value of BESL to be sent in an LPM transaction. This value is also used to initiate resume for a duration TL1HubDrvResume1 for host-initiated resume. - Device Mode: This field is updated with the Received LPM Token BESL bmAttribute when an ACK/NYET/STALL response is sent to an LPM transaction. If BESL[3:0],

RW

BREMOTEWAKE

RemoteWakeEnable (bRemoteWake)

Mode: Host and Device Host Mode: The value of remote wake up to be sent in wIndex field of LPM transaction. Device Mode: This field is read only. It is updated with the Received LPM Token bRemoteWake bmAttribute when an ACK/NYET/STALL response is sent to an LPM transaction.

RW

ENBLSLPM

Enable utmi_sleep_n (EnblSlpM)

Mode: Host and Device For ULPI interface: The application uses this bit to control the utmi_sleep_n assertion to the PHY when in L1 state. For the host, this bit is valid only in Local Device mode. Note: - When a ULPI interface is configured, enabling this bit results in a write to Bit 7 of the ULPI Function Control register. The Synopsys ULPI PHY supports writing to this bit, and in the L1 state asserts SleepM when utmi_l1_suspend_n cannot be asserted. - When a ULPI/UTMI PHY associated with the controller (Host or device) does not support the LPM sleep feature clock gating, it is recommended to keep the EnblSlpM bit in disabled state (= 1'b0). This ensures the ULPI wrapper is in enabled mode and detects any wakeup events. For all other interfaces: The application uses this bit to control utmi_sleep_n assertion to the PHY in the L1 state. For the host, this bit is valid only in Local Device mode.

RW

HIRDTHRES

BESL/HIRD Threshold (HIRD_Thres)

Device Mode: Note: When a ULPI/UTMI PHY associated with the controller (Host or device) does not support the LPM sleep feature clock gating, it is recommended to keep the HIRD_Thres[12] bit in disabled state (= 1'b0). This ensures the ULPI wrapper is in enabled mode and detects any wakeup events. - EnBESL = 1'b0: The core puts the PHY into deep low power mode in L1 (by core asserting L1SuspendM) when HIRD value is greater than or equal to the value defined in this field HIRD_Thres[3:0] and HIRD_Thres[4] is set to 1b1. - EnBESL = 1'b1: The core puts the PHY into deep low power mode in L1 (by core asserting L1SuspendM) when BESL value is greater than or equal to the value defined in this field BESL_Thres[3:0] and BESL_Thres [4] is set to 1'b1. - DCTL.DeepSleepBESLReject = 1'b1: In device initiated resume, the core expects the Host to resume service to the device within the BESL value corresponding to L1 exit time specified in HIRD_Thres[3:0]. The Device sends a NYET response when the received HIRD in LPM token is greater than HIRD threshold. Host Mode: The core puts the PHY into deep low power mode in L1 (by core asserting L1SuspendM) when HIRD_Thres[4] is set to 1'b1. HIRD_Thres[3:0] specifies the time for which resume signaling is to be reflected by host (TL1HubDrvResume2) on the USB bus when it detects device initiated resume. To differentiate between Deep Sleep and Shallow Sleep, HIRD greater than or equal to HIRD threshold comparison is done. For differentiating between NYET or ACK response for LPM token HIRD greater than HIRD Threshold comparison is used. - When EnBESL = 1'b0, HIRD_Thres must not be programmed with a value greater than 4'b1100 in host mode since this exceeds maximum TL1HubDrvResume2. - When EnBESL = 1'b1, HIRD_Thres must not be programmed with a value greater than 4'b0110 in host mode since this exceeds maximum TL1HubDrvResume2. For additional details, see the "Additional Details on GLPMCFG.HIRD_Thres Register Field" section in the databook.

R

COREL1RES

LPM Response (CoreL1Res)

Device Mode: The response of the core to LPM transaction received is reflected in these two bits. Host Mode: Handshake response received from local device for LPM transaction

R

SLPSTS

Port Sleep Status (SlpSts)

Device Mode: This bit is set as long as a Sleep condition is present on the USB bus. The core enters the Sleep state when an ACK response is sent to an LPM transaction and the TL1TokenRetry timer has expired. To stop the PHY clock, the application must set the Port Clock Stop bit, which asserts the PHY Suspend input signal. The application must rely on SlpSts and not ACK in CoreL1Res to confirm transition into sleep. The core comes out of sleep: - When there is any activity on the USB line_state - When the application writes to the Remote Wakeup Signaling bit in the Device Control register (DCTL.RmtWkUpSig) or when the application resets or soft-disconnects the device. Host Mode: The host transitions to Sleep (L1) state as a side-effect of a successful LPM transaction by the core to the local port with ACK response from the device. The read value of this bit reflects the current Sleep status of the port. The core clears this bit after: - The core detects a remote L1 Wakeup signal; - The application sets the Port Reset bit or the Port L1Resume bit in the HPRT register; or - The application sets the L1Resume/ Remote Wakeup Detected Interrupt bit or Disconnect Detected Interrupt bit in the Core Interrupt register (GINTSTS.L1WkUpInt or GINTSTS.DisconnInt, respectively).

R

L1RESUMEOK

Sleep State Resume OK (L1ResumeOK)

Device and Host Mode: Indicates that the application or host can start resume from Sleep state. This bit is valid in LPM sleep (L1) state. It is set in sleep mode after a delay of 50 micro sec (TL1Residency). The bit is reset when SlpSts is 0.

RW

LPMCHNLINDX

LPM Channel Index

Host Mode: The channel number on which the LPM transaction has to be applied while sending an LPM transaction to the local device. Based on the LPM channel index, the core automatically inserts the device address and end point number programmed in the corresponding channel into the LPM transaction. Device Mode: LPM Accept Control (LPM_Accept_Ctrl) LPM_Accept_Ctrl[0] (LPM_Chnl_Indx[3]): The application can use this bit to accept an LPM token even if data is present in the INTR endpoint TxFIFO. This bit is applicable only for Dedicated TX FIFO configurations (OTG_EN_DED_TX_FIFO=1).

RW

LPMRETRYCNT

LPM Retry Count (LPM_Retry_Cnt)

Host Mode: Number of additional LPM retries that the HOST would perform if the Device Response was an ERROR until a valid device response is received (STALL/NYET/ACK). Device Mode: LPM Accept Control (LPM_Accept_Ctrl) LPM_Accept_Ctrl[1]: The application can use this bit to reject an LPM token (NYET) between multiple stages of a single control transfer LPM_Accept_Ctrl[2]: The application can use this bit to accept an LPM token even if data is present in the ISOC endpoint TxFIFO. This bit is applicable only for Dedicated TxFIFO configurations (OTG_EN_DED_TX_FIFO=1). LPM_Accept_Ctrl[3]: The application can use this bit to accept an LPM token even if data is present in the BULK endpoint TxFIFO. This bit is applicable only for Dedicated TxFIFO configurations (OTG_EN_DED_TX_FIFO=1).

RW

SNDLPM

Send LPM Transaction (SndLPM)

Host Mode: When set by application software, an LPM transaction containing two tokens, EXT & LPM is sent. Cleared by the hardware once a valid response (STALL./NYET/ACK) is received from the Device or the core had finished transmitting the programmed number of LPM retries. Note that this bit must be set only when the host is connected to local port.

R

LPMRETRYCNTSTS

LPM Retry Count Status (LPM_RetryCnt_Sts)

Host Mode: Number of LPM Host Retries still remaining to be transmitted for the current LPM sequence.

RW

LPMENBESL

LPM Enable BESL (LPM_EnBESL)

This bit enables the BESL feature as defined in LPM Errata

RW

LPMRESTORESLPSTS

LPM Restore Sleep Status (LPM_RestoreSlpSts)

When the application power gates the core (Partial Power Down / Hibernation) the application needs to program this bit to restore the LPM status in the core. The application needs to program this bit, during restore process, based on whether it decides to go into Shallow Sleep (Clock Gating Only) or Deep Sleep (Power Gating) based on the BESL value received from the Host