Registers

Starts continuous PDM transfer

Stops PDM transfer

Subscribe configuration for task START

Subscribe configuration for task STOP

PDM transfer has started

PDM transfer has finished

The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM

This event is generated if an error occurs during the bus transfer.

Publish configuration for event STARTED

Publish configuration for event STOPPED

Publish configuration for event END

Publish configuration for event DMA.BUSERROR

Enable or disable interrupt

Enable interrupt

Disable interrupt

Pending interrupts

PDM module enable register

Defines the routing of the connected PDM microphone signals

Left output gain adjustment

Right output gain adjustment

Selects the decimation ratio between PDM_CLK and output sample rate. When RATIO is selected to be "custom", the decimation rate should be set using the FILTER.CTRL field before setting the RATIO to 7

Change PRESCALER.DIVISOR accordingly.

Aditional PDM configurability

Settings for the high-pass filter

High pass filter disable

Soft mute function

Soft mute settings

Input Data Sampling with Number of ckFilterL (double frequency of PDM_CLK) Clock Cycle Delay. Optionally,input sample point can be delayed independently on left and right channels using FILTER:CTRL[20:19] bits

Pin number configuration for PDM CLK signal

Pin number configuration for PDM DIN signal

Master clock generator configuration

RAM address pointer to write samples to with EasyDMA

Number of bytes to allocate memory for in EasyDMA mode

The prescaler is used to set the PDM frequency

Terminate the transaction if a BUSERROR event is detected.

Address of transaction that generated the last BUSERROR event.