RRAMC provides a mechanism to erase the whole RRAM in one operation by using the ERASE.ERASEALL register.
When ERASEALL is triggered, RRAMC will write 0xFFFFFFFF to the entire RRAM memory, including user information configuration registers (UICR) and the secure information configuration region (SICR) . ERASEALL will not erase the factory information configuration registers (FICR).
This functionality can be blocked by ERASE protection. For details, see CTRL-AP — Control access port.
Note:
Unlike the CTRL-AP ERASEALL operation that can be activated from a debugger, the RRAMC
ERASEALL operation will not automatically grant access to the debug access port.
Note:
The write-buffer must be committed before initiating an erase operation.