The UARTE receiver is started by triggering the DMA.RX.START task. The UARTE receiver uses EasyDMA to store incoming data in an RX buffer in RAM.
The RX buffer is located at the address specified in the DMA.RX.PTR register. The DMA.RX.PTR register is double-buffered and can be updated and prepared for the next DMA.RX.START task immediately after the EVENTS_DMA.RX.READY event is generated. The size of the RX buffer is specified in the DMA.RX.MAXCNT register. UARTE generates an DMA.RX.END event when it has filled up the RX buffer, as seen in the following figure.
For each byte received over the RXD line, an RXDRDY event is generated. This event is likely to occur before the corresponding data has been transferred to RAM.
The DMA.RX.AMOUNT register can be queried following an DMA.RX.END event to see how many new bytes have been transferred to the RX buffer in RAM since the previous DMA.RX.END event.
The UARTE receiver is stopped by triggering the DMA.RX.STOP task. The RXTO and DMA.RX.END events are generated when UARTE has stopped.
Stopping the UARTE with a RX buffer that is empty or not completely filled up will also cause the DMA.RX.END event to be generated.
The number of bytes stored in the RX buffer can be found by reading the DMA.RX.AMOUNT register following the DMA.RX.END event.
To stop UARTE, trigger the DMA.RX.STOP task. After the STOP task is triggered, UARTE can receive up to four bytes during the timeout period. The data received during the timeout period will be written to DMA.RX.PTR, and limited by DMA.RX.MAXCNT registers. MAXCNT should be set to at least four bytes to allow for this, while following the DMA.RX.END event, the DMA.RX.AMOUNT register will indicate the actual number of bytes received.
If hardware flow control is enabled in the HWFC field in the CONFIG register, the RTS signal will be deactivated when the receiver is stopped via the DMA.RX.STOP task, or when UARTE can only receive three more bytes in its internal RX FIFO.
With flow control disabled, the UARTE will function in the same way as when the flow control is enabled, except that the RTS line will not be used. This means that no signal will be generated when UARTE is only able to receive three additional bytes in its internal RX FIFO. Data received when the internal RX FIFO is full, will be lost.
The UARTE receiver is least active when it is stopped, consuming the least amount of energy. This is before it is started via DMA.RX.START, or after it has been stopped via DMA.RX.STOP and the RXTO event has been generated. See POWER — Power control for more information about power modes.