The clock source for SCK and MCK is selectable in registers CONFIG.MCK.SRC and CONFIG.SCK.SRC respectively.
The following clocks can be selected as the clock source.
- Peripheral clock (PCLK)
- Additional clock (ACLK)
To improve the clock accuracy and jitter performance, it is recommended (but not mandatory) that the PCLK source used is running off the external crystal. The ACLK source requires the use of a crystal. See CLOCK — Clock control for more information about clock sources.
The clock generator can be bypassed so that MCK or SCK is derived directly from the input source. This can be configured in the BYPASS field of their respective registers CONFIG.SCK.SRC and CONFIG.SCK.SRC.